COMPETENCIES of the Technology Specific Module of Industrial Electronics (TEEOI):



TEEOI3 Knowledge of the fundamentals and applications of Digital Electronics and microprocessors.

TEEOI6 Ability to design analogue, digital and power electronic systems (in particular digital electronic systems).



LEARNING RESULTS:



1.To acquire the fundamentals and basic knowledge for the development of digital electronics applications.

2.To know and be able to work with the most widely used digital information representation systems.

3.Master the techniques of analysis, synthesis and error detection of digital circuits.

4.Develop applications based both on own designs and on integrated circuits from commercial logic families.

5.Apply the design methodologies for both hard-wired and programmable digital systems.

6.Efficiently use of the electronic design tools used in the laboratory.

Brief description of contents: Analysis and design of Digital Systems, .



Theoretical and practical content, more specifically, is developed through the following topics:



T0: Introduction

T1: Introduction to Digital Circuit Design and Implementation

T2: Hardware Description Languages

T3: Digital representation of information

T4: Fundamentals of Digital Electronics

T5: Combinational logic systems

T6: Sequential Logic Systems

T7: Implementation of digital circuits

T8: Memories

The way in which teaching is developed combines the expository mode with active methodologies based on cooperative learning, as well as inverted or flipped class. In addition, problem/project based learning (PBL/ABP) is used, whose scenarios will be real industrial applications that students will have to face collaboratively and propose, simulate and implement their own control solutions from the field of digital electronics.



The necessary competences and skills will be acquired both in the classroom sessions (M theory sessions + GA classroom sessions + GL Laboratory sessions) and in the non-classroom sessions.

. CONTINUOUS ASSESSMENT :



.. Block of Theory and Exercises:



For the evaluation of these contents, the results obtained from the following tests are considered:

- written tests, with questions and exercises: individual exams (1)

- individual tests, carried out during class time by the students present in the classroom.

- questionnaires in eGela, carried out outside the classroom

(1) for the calculation of the final mark for this block, it is essential to pass 30% of each of these written individual tests.



The final mark for this block of Theory and Exercises is obtained:

- written individual exams: 35%.

- tests: 10%.

- questionnaires: 5%.



.. Block of Laboratory Practices:



For the evaluation of these contents, the results obtained from the following tests are considered:

- Individual laboratory exam (2)

- Project solution to the proposed problem: Code, simulation and implementation of the project, validation with the teaching staff, report and other tasks.

(2) In order to calculate the final mark for this block, it is mandatory to pass at least the 50% in this test.

Both attendance at the laboratory sessions and the delivery of the project are compulsory.

In case of not having attended more than two laboratory sessions without the corresponding justification, it will result in the rejection of the continuous assessment, thus, the only option will be the final assessment, provided that the requirements to apply for it have been met.



The final mark for the Block of Laboratory Practices is obtained in this way:

- An Individual laboratory exam: 50%.

- A Cooperative project: 50%.



Students taking the subject in continuous assessment will obtain the mark of "no-show" when they meet the conditions established in the corresponding UPV/EHU regulations.



. FINAL EVALUATION:



Students who wish to refuse continuous assessment must do so under the conditions set out in the current regulations.



In this case, the assessment of competences will be by means of:

- the delivery and demonstration of a project (compulsory) and

- a FINAL EXAMINATION: on the official date of the exams period of the ordinary exams. This exam will consist of 2 tests, one for each block: 1 written exam with questions of Theory and Exercises, and 1 exam of Laboratory Practices.



. CONDITION FOR PASSING THE COURSE:



For passing the course is a prerequisite:

- to pass the exam related to the block of Theory and Exercises, and

- to pass the exam related to the block of Laboratory Practices (practical exam + project)



. FINAL QUALIFICATION:



The final mark for the course is obtained in this way:

-Block of Theory and Exercises: 50%.

-Block of Laboratory Practices (50% laboratory test + 50% project): 50%.

-If only one of the two previous blocks is passed, the FINAL mark will be a maximum of 4 (failed). The passed block will remain as such until the extraordinary exam.

-In the block of Theory and Exercises no parts are released, the whole block can be released.

-1 test (the exam or the project) can be released in the block of Laboratory Practices.



. HOW TO REJECT THE ORDINARY EXAMS:



Students who wish to refuse to the ordinary exams call must do so in accordance with the conditions and deadlines set out in the current UPV/EHU regulations.

- Presentations, scripts, assignments and complementary material of the course: Virtual Campus/EGela Platform/Digital Electronics. 2024/25

Basic bibliography

- FLOYD, T.L. Fundamentos de Sistemas Digitales. Ed. Prentice-Hall

- TOCCI, R.J. Sistemas Digitales. Principios y aplicaciones. Ed. Prentice-Hall

- ÁLVAREZ RUIZ DE OJEDA, L.J. Diseño Digital con Lógica Programable, Ed. Tórculo Edicións

- LAMERES, BROCK J. Introduction To Logic Circuits & Logic Design With VHDL, Ed. Springer Nature Switzerland

- LAMERES, BROCK J. Quick Start Guide To VHDL, Ed. Springer Nature Switzerland

- GARCÍA ZUBÍA, J.; ANGULO MARTÍNEZ, I.; HERNÁNDEZ JAYO, U. Fundamentos de electrónica digital: acceso a laboratorio remoto de FPGA/VHDL. Ed. Garceta

- PARDO F. VHDL Lenguaje para descripción y modelado de circuitos (Universidad de Valencia)

In-depth bibliography

- HAYES, J. P. Introducción al Diseño Lógico Digital. Ed. Addison-Wesley
- MANDADO, E. Dispositivos Lógicos Programables y sus aplicaciones. Ed. Thomson-Paraninfo
- GARCÍA ZUBÍA, J. Problemas Resueltos de Electrónica Digital. Ed. Paraninfo Thomson.
- VELASCO, J. Problemas de Sistemas Electrónicos Digitales. Ed. Paraninfo.
- BAENA, C. Problemas de Circuitos y Sistemas Digitales. Ed. McGraw-Hill.
- ALMONACID, G. Desarrollo y Aplicación de Sistemas Digitales. Ed. Paraninfo
- IEEE Standard VHDL Language Reference Manual
- ASHENDEN, P.J.; LEWIS, J. VHDL-2008 Just the new stuff. Ed. Morgan Kaufmann.

Journals

- Revista española de Electrónica
- Automática e Instrumentación